Flash memories are popular memory storage devices because they store information in the absence of continuous power and are capable of being constructed in a very compact form. Flash memory is typically constructed by fabricating a plurality of floating gate transistors in a silicon substrate. A floating gate transistor is capable of storing electrical charge either on a separate gate electrode, known as a floating gate, or in a dielectric layer underlying a control gate electrode. Generally speaking, data is stored in a nonvolatile memory device by the storage of an electrical charge in the floating gate.
A cell is typically programmed by applying a predetermined voltage to the control gate, a second predetermined voltage to the drain, and grounding the source. This causes channel hot electrons to be injected from the drain depletion region into the floating gate. The predetermined voltages that are used during the programming operation are typically higher than the supply voltage ("Vcc"). When reading a cell, if the cell is programmed, the threshold voltage will be relatively high and the bit line current will be zero or relatively low. If the cell is not programmed or erased, the threshold voltage will be relatively low, the control gate voltage will enhance the channel and the bit line current will be relatively high.
Common flash interface or CFI, in one form or another, was introduced to help standardize the method in which peripheral devices can obtain operating information about the flash memory during operation. When operating in CFI mode and "Query Command" is received, the flash memory is capable of providing peripheral devices with information regarding the size, geometry and capability of the flash memory. Flash memory that supports CFI use the "Query Command" to cause the flash memory to return information about the flash memory to the peripheral device. After the "Query Command" has been issued, the flash memory enters the "Query mode," thereby generating a read output of the CFI Query data structure. The CFI Query data structure contains a command set and control interface ID code that specifies a vendor-specific control interface for a family of flash memory.
The Query data structure also contains common flash memory parameters and vendor-specified data areas. This information provides the peripheral device with all the necessary information for controlling Read/Write/Erase operations for a particular family of flash memory according to a vendor-specified interface. Any additional information not contained in the common CFI Query data structure is located in vendor-specific extended Query tables, the address locations of which are contained in the general CFI Query data structure. CFI allows flash memory vendors to standardize their existing interfaces for long-term compatibility with families of flash memory.
In prior art flash memory, the CFI logic was incorporated into a separate portion of the chip as a read only memory ("ROM") array consisting of a plurality of rows and columns of transistors. The amount of information stored in the CFI logic requires approximately 64 bytes (512 bits) of storage capacity. In order to decode and retrieve the information contained in the ROM, extra peripheral logic was added to the flash memory. In particular, an x-decoder circuit and a y-decoder circuit were needed to decode the information stored in the ROM array. The CFI information was also stored in a memory matrix that was accessed by the x-decoder circuit and the y-decoder circuit while the flash memory was in CFI mode. As one skilled in the art would recognize, the addition of these extra circuits to the flash memory increases the die size of the flash memory. In addition, if the size of the CFI array needs to expand due to the addition of more CFI data, even more area will be required if the current CFI architecture is used.
To that end, a need exists in flash memory for a method and system of providing flash memory with CFI architecture without substantially increasing the die size of the flash memory and the need for additional logic circuits.